Accelerating Memory-Bound Applications with Near-Data Processing: From Architectural Design to Full-System Simulation, by João Vieira

On April 21st, PhD student João Vieira will defend his thesis "Accelerating Memory-Bound Applications with Near-Data Processing: From Architectural Design to Full-System Simulation". The defense will take place at 14:00, in the Abreu Faro Auditorium (Interdisciplinary Complex) at IST, Alameda campus.
The thesis, from the field of Electrical and Computer Engineering, was supervised by Professor Pedro Tomás.
The jury will be chaired by Professor Helena Geirinhas Ramos and composed of Professors Pedro Tomás and Leonel Sousa, from DEEC, Luís Silva, from Técnico, João Ferreira, from the Faculty of Engineering at the University of Porto, and Hervé Paulino, from the Faculty of Sciences and Technology at the Nova University of Lisbon.